1. Field of the Invention
The present invention relates to a plasma display apparatus and method of driving the same, and more particularly, to a plasma display apparatus and method of driving the same, wherein contour noise and flicker are reduced considering the brightness of an image.
2. Background of the Related Art
Generally, a plasma display panel (hereinafter, referred to as a “PDP”) is adapted to display an image by light-emitting phosphors with ultraviolet generated during the discharge of an inert mixed gas such as He+Xe or Ne+Xe. This PDP can be easily made thin and large, and it can provide greatly enhanced image quality with the recent development of the relevant technology. Particularly, a three-electrode AC surface discharge type PDP has advantages of lower driving voltage and longer life span as a wall charge is accumulated on a surface in discharging and electrodes are protected from sputtering caused by discharging.
FIG. 1 is a perspective view illustrating the construction of a discharge cell of a conventional three-electrode AC surface discharge type PDP.
Referring now to FIG. 1, the three-electrode AC surface discharge type PDP includes a number of scan electrodes Y and a number of sustain electrodes Z, which are formed on a bottom surface of an upper substrate 10, and an address electrode X formed on a lower substrate 18.
The discharge cell of the PDP is formed every intersection of the scan electrodes Y, the sustain electrodes Z and the address electrodes X, and is arranged in the matrix form.
Each of the scan electrodes Y and the sustain electrodes Z includes a transparent electrode 12, and a metal bus electrode 11 which has a line width narrower than that of the transparent electrode 12 and is disposed at one side of the transparent electrode 12. The transparent electrode 12, which is generally made of ITO (Indium Tin Oxide), is formed on the bottom surface of the upper substrate 10. The metal bus electrode 11, which is generally made of metal, is formed on the transparent electrode 12, and serves to reduce a voltage drop caused by the transparent electrode 12 having high resistance. On the bottom surface of the upper substrate 10 in which the scan electrodes Y and the sustain electrodes Z are disposed is laminated an upper dielectric layer 13 and a protective layer 14. The upper dielectric layer 13 is accumulated with a wall charge generated during plasma discharging. The protective layer 14 serves to protect the electrodes Y and Z and the upper dielectric layer 13 from sputtering caused upon plasma discharging, and also to improve efficiency of secondary electron emission. Magnesium oxide (MgO) is generally used as the protective layer 14.
The address electrodes X are formed on the lower substrate 18 in a direction in which they cross the scan electrodes Y1 to Yn and the sustain electrodes Z. On the lower substrate 18 is formed a lower dielectric layer 17 and barrier ribs 15. A phosphor layer 16 is coated on the surfaces of both the lower dielectric layer 17 and the barrier ribs 15. The barrier ribs 15 physically divide the discharge cells. The phosphor layer 16 is excited with an ultraviolet generated during the plasma discharging to generate any one visible light of red, green and blue lights.
An inert mixed gas, such as He+Xe, Ne+Xe or He+Xe+Ne, for discharge is inserted into discharge spaces of the discharge cells, which are defined between the upper substrate 10 and the barrier ribs 15 and between the lower substrate 18 and the barrier ribs 15.
Such a three-electrode AC surface discharge type PDP is driven with one frame being divided into several sub-fields of different emission numbers in order to implement gray levels of an image. If it is desired to display an image with 256 gray levels, a frame period (16.67 ms) corresponding to 1/60 seconds is divided into 8 sub-fields SF1 to SF8, as shown in FIG. 2. Each of the sub-fields SF1 to SF8 is divided into a reset period for initializing a discharge cell, an address period for selecting a discharge cell, and a sustain period for implementing gray levels according to the number of discharge. The reset period and the address period of each of the sub-fields SF1 to SF8 are the same every sub-field, whereas the sustain period and its discharge number increase in the ratio of 2n(n=0, 1, 2, 3, 4, 5, 6, 7) in each sub-field.
Meanwhile, when a frequency of a picture signal is 50 Hz as in the PAL (Phase Alternation by Line) television mode, one frame period of 20 ms includes a number of sub-fields and is time-divided into two sub-field groups having an emission center. This sub-field pattern is shown in FIG. 3. In FIG. 3, “Vsync” is a vertical sync signal, and SFP is a sub-field pattern including a number of sub-fields. The sub-field pattern of FIG. 3 can have two sub-field groups SFG1, SFG2 respectively having an emission center, which are disposed in an overlapping manner, so that flicker can be reduced. If mapped data are displayed on a PDP with the 50 Hz-based sub-field pattern as shown in FIG. 3, however, contour noise is likely to occur two ore more times within one frame period. There also occurs a problem in that contrast characteristics are degraded due to a driving waveform depending upon the arrangement of sub-fields.
Further, the 50 Hz-based sub-field pattern as shown in FIG. 3 serves as a cause to differentiate a picture quality degradation factor depending upon the brightness of an image. For example, in the case where an image is displayed on a PDP with the 50 Hz-based sub-field pattern as shown in FIG. 3, when the brightness of an image is low, the picture quality of the display image is degraded due to contour noise, and when the brightness of an image is relatively high, the picture quality of the display image is degraded due to flicker. This is because the start position of each of the two sub-field groups SFG1, SFG2 is the same regardless of the brightness of an image, i.e., an average picture level (hereinafter, referred to as “APL”), as shown in FIG. 4. In FIG. 4, a start flag Fst is a signal indicating the start position of the first sub-field group SFG1 that is synchronized to a start time point of a frame period. A mid flag Fmid is a start time point of a second sub-field group SFG2 that is set to approximately a half time point of the frame period.
Meanwhile, when the APL is high (H), a large number of sustain pulses is allocated, and when the APL is low (L), a relatively small number of sustain pulses is allocated. Thus, as can be seen from FIG. 4, there is a problem in that an effective length of each of the sub-field groups SFG1, SFG2 varies according to the APL.